TY  - BOOK
AU  - Umamageswaran, Kothanda
AU  - Pandey, Sheetanshu L
AU  - Wilsey Philip A
TI  - Formal semantics and proof techniques for optimizing VHDL models
SN  - 792383753
U1  - 621.392 UMA/F 
PY  - 1999///
CY  - Boston
PB  - Kluwer Academic Publishers
KW  - VHDL
ER  -